Figure 4–2. TMS320C6211 Internal Memory Block Diagram
Cache RAM
256
4K Bytes
64
Cache RAM
4K bytes
64
L1 program cache
controller
256
Program fetch
C62x CPU
Data path A
Data path B
32 32
32 32
L1 data cache
controller
TMS320C6211/C6711 Two-Level Internal Memory
snoop address
data
256
address
L2 cache
controller
128
128
address
data
data
snoop address
Overview
RAM
64K Bytes
256
128
64
EDMA
64
4-3