Hpi Registers - Texas Instruments TMS320C6201 Reference Manual

HPI Registers

7.3 HPI Registers
Table 7–5. HPI Registers
7.3.1 HPI Control Register (HPIC)
7-16
Table 7–5 summarizes the three registers that the HPI uses for communication
between the host device and the CPU. HPID contains the data that was read from
the memory accessed by the HPI if the current access is a read or the data that
is written to the memory if the current access is a write. HPIA contains the address
of the memory accessed by the HPI at which the current access occurs. This
address as a 30-bit-word address, so the two LSBs are unaffected by HPIA
writes and are always read as 0.
Register Register
Abbreviation Name
HPID HPI data
HPIA HPI address
HPIC HPI control
The HPIC, shown in Figure 7–10 and summarized in Table 7–6, is normally the
first register accessed to set configuration bits and initialize the interface. The
HPIC is organized as a 32-bit register whose high halfword and low halfword con-
tents are the same. On a host write, both halfwords must be identical. The low
halfword and the high halfword are actually the same storage locations. No stor-
age is allocated for the read-only reserved values. Only CPU writes to the lower
halfword affect HPIC values and HPI operation.
Host CPU
Read/Write Read/Write
Access Access
RW –
RW –
RW RW
CPU Read/Write
(Hex Byte Address)
–
–
0188 0000h