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Table 9–1. EMIF Signal Descriptions
6
6
6
6
2
7
2
2
0
0
0
1
1
1
2
1 Pin
CLKOUT1
CLKOUT2
BUSREQ
ECLKOUT
ECLKIN
ED[31:0]
EA[21:2]
CE0
CE1
CE2
CE3
BE[3:0]
ARDY
M AOE
M AWE
M ARE
M M SSADS
M M SSOE
M M SSWE
SSCLK
M M SDRAS
M M SDCAS
M M SDWE
SDA10
SDCLK
HOLD
HOLDA
† 'M' indicates a multiplexed output signal
(I/O/Z) Description
O
Clock output. Runs at the CPU clock rate.
O
Clock output. Runs at 1/2 the CPU clock rate. Used for synchronous memory
interface on 'C6202
O
Active high bus request signal
O
EMIF clock output. All EMIF I/O are clocked relative to ECLKOUT.
I
EMIF clock input. Must be provided by system.
I/O/Z
Data I/O. 32-bit data input/output from external memories and peripherals
O/Z
External address output. Drives bits 21–2 of the byte address.
O/Z
Active low chip select for memory space CE0
O/Z
Active low chip select for memory space CE1
O/Z
Active low chip select for memory space CE2
O/Z
Active low chip select for memory space CE3
O/Z
Active low byte enables. Individual bytes and halfwords can be selected for both
read and write cycles. Decoded from two LSBs of the byte address.
I
Ready. Active low asynchronous ready input used to insert wait states for
slow memories and peripherals.
O/Z
Active low output enable for asynchronous memory interface
O/Z
Active low write strobe for asynchronous memory interface
O/Z
Active low read strobe for asynchronous memory interface
O/Z
Active low address strobe/enable for SBSRAM interface
O/Z
Output buffer enable for SBSRAM interface
O/Z
Active low write enable for SBSRAM interface
O/Z
SBSRAM interface clock. Programmable to either the CPU clock rate or half
of the CPU clock rate.
O/Z
Active low row strobe for SDRAM memory interface
O/Z
Active low column strobe for SDRAM memory interface
O/Z
Active low write enable for SDRAM memory interface
O/Z
SDRAM A10 address line. Address line/autoprecharge disable for SDRAM
memory.
O/Z
SDRAM interface clock. Runs at 1/2 the CPU clock rate. Equivalent to
CLKOUT2.
I
Active low external bus hold (3-state) request
O
Active low external bus hold acknowledge
External Memory Interface
Overview
9-7
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