Dma Transfer Examples; Content Of Relevant Registers (Single Frame Transfer); Content Of Dma Channel Primary Control Register Fields - Texas Instruments TMS320C6201 Reference Manual

Expansion Bus I/O Port Operation
8.4.3

DMA Transfer Examples

8.4.3.1 Example 1 (single frame transfer)
Table 8–9. Content of Relevant Registers (single frame transfer)
Table 8–10. Content of DMA Channel Primary Control Register Fields
DST SRC
reload reload EMOD FS
00 00 0 0
8-20
Peripherals located on the I/O port of the expansion bus are accessible only
via DMA transactions. This section gives a very simple example used to trans-
fer a single frame of 256 words from a FIFO located in XCE0 into internal data
memory at 8000 0000h. This example simply sets up the source and destina-
tion registers, and starts the DMA with incrementing destination address and
a non-changing source address. The source address does not change, since
the FIFO is located in a fixed memory location. The content of relevant regis-
ters and DMA channel primary control register are shown in Table 8–9 and
Table 8–10.
Register
DMA primary control register
DMA source
DMA destination
Transfer counter register
TCINT PRI WSYNC RSYNC
0 0 00000 00000 0
Contents
0000 0041h
4000 0000h
8000 0000h
0000 0100h
CNT
INDEX reload SPLIT ESZISE
0 00 00
DST SRC
DIR DIR STATUS START
01 00 00 01