Revision History - Xilinx Virtex-4 RocketIO User Manual

Revision History

The following table shows the revision history for this document.
Date Version
03/01/05 1.0
03/10/05 1.1
04/07/05 1.2
07/01/05 1.3
01/16/06 2.0
05/23/06 3.0
07/19/06 3.1
09/29/06 3.2
UG076 (v4.1) November 2, 2008
Xilinx Initial Release.
Modified "Power Supply Requirements" in Chapter 6
General typographical edits. Revised
Figure 2-11, Figure 2-12, Figure
Transceiver," page 85 and
Table 7-4, Table 7-5, Table
Changes in Figure 2-4, Figure
Revised Table 3-23 and Table
Table 7-4, Table 7-5, Table
Appendix C. Added a default value to DCDR_FILTER in
Major revision. All material completely revised and updated, substantial new material
added.
Major revision. Chapter 1: All Ports/Attributes tables reviewed and expanded. Chapter
2: New Reset section. Low-latency material removed. Chapter 8: New. Chapters 9-12
(Section II): New.
•
Table 1-3: Corrected maximum reference clock frequency to 644 MHz for Aurora
protocols.
•
Table 1-11: Deleted instruction to set TXTERMTRIM to 0000.
•
Chapter 2, section "Resetting the
♦
Modified all references to LOCKUPDATE cycles to REFCLK cycles.
♦
Corrected state definitions in all flowcharts.
•
Chapter 3, section "Channel
•
Chapter 8, section "RXSYNC":
♦
Modified all references to LOCKUPDATE cycles to REFCLK cycles.
•
Table C-6 and Table C-19: Corrected TXTERMTRIM default state to 1100.
• Removed references to the FF1760 package. Not supported.
• Removed references to 1-byte and 2-byte external fabric widths for PCS Bypass mode.
Not supported.
• Removed references to OC-48 protocol. Not supported.
• Removed references to Digital ReceiverLoopback. Not supported.
• Removed former Tables 4-6, 4-7, and Figure 4-12 from section
Signals."
• Added RX/TXFDCAL_CLOCK_DIVIDE setting of FOUR for RX/TX calibration with
reference clock speeds over 500 MHz
• Added in several places throughout the Guide the recommendation to use the
RocketIO Wizard for MGT configuration.
• Added several new sections and diagrams to
Considerations" relating to powering MGTs. Existing material edited and updated.
• Added new section
"SelectIO-to-MGT
Design Considerations."
• Added
Appendix D, "Special Analog Functions."
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Revision
Table 2-2, Table
6-4, Figure 6-8, and Figure
Figure 2-12. Edited Table 4-1,
7-6, Table A-1, Table C-14, and
2-9, Figure 3-14, Figure
3-24. Added Table 5-5, revised
7-6. For clarity, revised all the notes in the tables in
Transceiver":
Bonding": Rewritten and enlarged.
(Table 4-4, Table
Chapter 6, "Analog and Board Design
Crosstalk"to
and Table 6-1, page 176.
2-8, Figure 2-7, Figure 2-8,
E-2. Added "Resetting the
Table 4-3, Table 4-5, Table
Table C-28.
4-9, Figure 6-4 and Figure
Table 5-5. Changes to
Appendix F.
"Out-of-Band (OOB)
4-5).
Chapter 6, "Analog and Board
Previously part of Chapter
Virtex-4 RocketIO MGT User Guide
7-3,
6-8.
4.