Xilinx Virtex-4 RocketIO User Manual page 276

Appendix A: RocketIO Transceiver Timing Model
Table A-2: RocketIO DCLK Switching Characteristics
Setup and Hold Relative to Clock (DCLK)
Clock to Out
Table A-3: RocketIO RXCRCCLK Switching Characteristics
Setup and Hold
Relative to Clock (RXCRCCLK)
Clock to Out
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Parameter
T _DEN/ T
GT11CCK GT11CKC
T _DWE/ T
GT11CCK GT11CKC
T _DADDR/ T
GT11DCK GT11CKD
T _DI/ T _DI
GT11DCK GT11CKD
T _DO
GT11CKO
T _DRDY
GT11CKO
Parameter
T _RXCRCDATAVALID/
GT11CCK
T _RXCRCDATAVALID
GT11CKC
T _RXCRCRESET/
GT11CCK
T _RXCRCRESET
GT11CKC
T _RXCRCDATAWIDTH/
GT11DCK
T _RXCRCDATAWIDTH
GT11CKD
T _RXCRCIN/
GT11DCK
T _RXCRCIN
GT11CKD
T _RXCRCINIT/
GT11DCK
T _RXCRCINIT
GT11CKD
T _RXCRCPD/
GT11DCK
T _RXCRCPD
GT11CKD
T _RXCRCOUT
GT11CKO
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Function
_DEN Control Input
_DWE Control Input
_DADDR Control Input
Data Input
Data Output
Control Output
Function
Control Input
C
ontrol Input
Control Input
Data Input
Control Input
Control Input
Data Output
Signal
DEN
DWE
DADDR
DI
DO
DRDY
Signal
RXCRCDATAVALID
RXCRCRESET
RXCRCDATAWIDTH
RXCRCIN
RXCRCINIT
RXCRCPD
RXCRCOUT
Virtex-4 RocketIO MGT User Guide
UG076 (v4.1) November 2, 2008
R