Xilinx Virtex-4 RocketIO User Manual page 22

Table 3-7: RXCHARISCOMMA Truth Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
Table 3-8: Deserializer Comma Detection Bypass . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
Table 3-9: 8B/10B Comma Symbol Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
Table 3-10: 8B/10B Decoder Byte-Mapped Status Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
Table 3-11: SONET Port Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Table 3-12: SONET Attribute Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
Table 3-13: ALIGN_COMMA_WORD Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Table 3-14: Definition of Clock Correction Sequence Bits 9-0. . . . . . . . . . . . . . . . . . . . . . 125
Table 3-15: Clock Correction Sequence/Data Correlation . . . . . . . . . . . . . . . . . . . . . . . . . 125
Table 3-16: Clock Correction Mask Example Settings (No Mask) . . . . . . . . . . . . . . . . . . 125
Table 3-17: Clock Correction Mask Example Settings (Mask Enabled). . . . . . . . . . . . . . 126
Table 3-18: Channel Bond Alignment Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
Table 3-19: Maximum Time Required to Process Channel Bond Sequences . . . . . . . . . 128
Table 3-20: Channel Bonding and Clock Correction Character Spacing . . . . . . . . . . . . . 129
Table 3-21: Signal Values for a Pointer Difference Status . . . . . . . . . . . . . . . . . . . . . . . . . 132
Table 3-22: Signal Values for a Channel Bonding Skew . . . . . . . . . . . . . . . . . . . . . . . . . . 132
Table 3-23: Signal Values for Event Indication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
Table 3-24: Loopback Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
Table 3-25: Variation of Recovered Clock Period. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
Table 3-26: Digital Receiver Attribute Settings (Line Rates ≤ 1.25 Gb/s) . . . . . . . . . . . . . 136
Chapter 4: PMA Analog Design Considerations
Table 4-1: Attributes Controlling Pre-Emphasis Characteristics. . . . . . . . . . . . . . . . . . . . 140
Table 4-2: TXDAT_TAP_DAC and TXPOST_TAP_DAC Settings . . . . . . . . . . . . . . . . . . 141
Table 4-3: RXDIGRX Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147
Table 4-4: Transmit Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
Table 4-5: Receive Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150
Table 4-6: PLL/Data Frequency Divergence as a Function of Lock and Hysteresis. . . . 151
Table 4-7: RocketIO Transceiver Power Control Description . . . . . . . . . . . . . . . . . . . . . . 151
Table 4-8: PMA Receiver Power Control Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
Table 4-9: PMA Power Control Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
Table 4-10: Power-Down of TX PMA Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
Chapter 5: Cyclic Redundancy Check (CRC)
Table 5-1: Ports for the RX and TX CRC Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153
Table 5-2: CRC Attributes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154
Table 5-3: Examples of Data Rates for CRC Calculation(1) . . . . . . . . . . . . . . . . . . . . . . . . 156
Table 5-4: Data Width and Active Data Bus Bits with RXDATA Mapping . . . . . . . . . . 157
Chapter 6: Analog and Board Design Considerations
Table 6-1: Case A Filtering Requirement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170
Table 6-2: Case B Filtering Requirement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170
Table 6-3: SelectIO Pin Guidance for XC4VFX60/40/20-FF672. . . . . . . . . . . . . . . . . . . . . . 175
22 www.xilinx.com Virtex-4 RocketIO MGT User Guide
UG076 (v4.1) November 2, 2008
R