Xilinx Virtex-4 RocketIO User Manual page 232

Multi-gigabit transceiver
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Chapter 8: Low-Latency Design
From the RX datapath perspective, this ensures that the system is synchronous and does
not require clock correction.
Based on the encoding, this would lead the user to pick Use Model RX_1B. See
According to
Table 8-16: Latency for Use Model RX_1B
Notes:
1. T
2. T
3. 1 UI = 1/3.125e9 = 320 ps
4. 64B/66B encoding/decoding is not supported.
The latency incurred is quite significant, although not using clock correction did reduce it.
The most significant source of latency is the RX buffer. A user could choose to bypass the
RX buffer and eliminate this latency. This implementation leaves it up to the user to design
a channel-bonding scheme in the fabric.
This would lead the user to choose Use Model RX_2A. See
Table
significant savings over previous implementations.
Table 8-17: Latency for Use Model RX_2A
Notes:
1. 64B/66B encoding/decoding is not supported.
232
Table 8-2, page
Receive Blocks
RX SERDES
PMA/PCS Interface
RX Data Alignment (CommaDet
Align)
Decoding (8B/10B)
RX buffer (No Clock Correction)
(4)
64B/66B Format (Bypass)
Fabric Interface (2 Byte)
Total:
= T
PMA RXCLK0
PCS RXCLK
= 1/156.25 MHz = 6.4 ns
RXUSRCLK2
8-2, bypassing the RX buffer results in a latency of 115.20 ns, which represents a
Receive Blocks
RX SERDES
PMA/PCS Interface
RX Data Alignment (CommaDet
Align)
Decoding (8B/10B)
RX Buffer (No Clock Correction)
(1)
64B/66B Format (Bypass)
Fabric Interface (2 Byte)
Total:
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195, this results in a latency of 332.80 ns.
Latency
1/40 serial clock
2 PCS RXCLK
3 PCS RXCLK
2 PCS RXCLK
3 PCS RXCLK + RXUSRCLK (Phase
Difference) + 8 RXUSRCLK (Latency)
+ 1 RXUSRCLK (Data Mux)
2 RXUSRCLK
1 RXUSRCLK + 2 RXUSRCLK2
= T
= 1 / 156.25MHz
RXUSRCLK
Latency
1
/
serial clock
40
1 PCS RXCLK
2 PCS RXCLK
2 PCS RXCLK
0 PCS RXCLK + 0 RXUSRCLK (Phase
Difference) + 0 RXUSRCLK (Latency)
+ 0 RXUSRCLK (Data Mux)
0 RXUSRCLK
1 RXUSRCLK + 2 RXUSRCLK2
Latency (ns)
*
2 = 12.8 ns
Table
8-17. According to
Latency (ns)
Virtex-4 RocketIO MGT User Guide
UG076 (v4.1) November 2, 2008
R
Table
8-14.
25.60
25.60
38.40
25.60
166.40
25.60
25.60
332.80
25.60
12.80
25.60
25.60
0
0
25.60
115.20

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