Xilinx Virtex-4 RocketIO User Manual page 42

Chapter 1: RocketIO Transceiver Overview
Table 1-5: RocketIO MGT PMA Ports (Continued)
Port
Clocks/Clock Status
RXLOCK
RXPMARESET
RXRECCLK1
RXRECCLK2
RXMCLK
TXLOCK
TXOUTCLK1
TXOUTCLK2
TXPMARESET
RXPCSHCLKOUT
TXPCSHCLKOUT
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I/O Port Size
When set to logic 1, indicates that the receiver is locked to the
reference clock or locked to the input data.
Logic 0 indicates the receiver is not locked. Possible reasons
include no reference clock, incorrect reference clock frequency,
O 1
incorrect attribute configuration, PMA power was not applied,
or receiver was not able to lock to data and is in the process of
locking to the local reference clock again. A toggling RXLOCK
signal indicates successful "coarse" lock to the local reference
clock, but unsuccessful lock to incoming data.
I 1 Resets the receiver PMA when set to logic 1.
Recovered clock from incoming data. See
O 1
in Chapter
Recovered clock from incoming data. Should not be used to clock
O 1 user logic; instead use RXRECCLK1. See
in Chapter
O 1 Reserved. This clock port is not supported.
When set to logic 1, indicates that the transmitter PLL is locked
to the reference clock.
This output cycles from between logic 0 and logic 1 during lock
acquisition. When the output maintains a logic 1 state, the
O 1
transmitter PLL is locked. Failure to acquire or maintain lock can
be due to no reference clock, incorrect reference clock frequency,
incorrect attribute configuration, or PMA power was not
applied.
Transmitter output clock derived from PLL based on transmitter
O 1
reference clock. See
Transmit output clock from the PCS TXCLK domain in the PCS.
O 1 Source is dependant on the PCS clock configuration. See
Transmit Clocks" in Chapter
Resets the transmitter PMA when set to a logic 1. Initializes the
high-speed digital sections of each transmitter. TX VCO
I 1
calibration is controlled by TXPMARESET. See
Chapter
O 1 Reserved. This clock port is not supported.
O 1 Reserved. This clock port is not supported.
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Definition
2.
2.
"PMA Transmit Clocks" in Chapter
2.
2.
Virtex-4 RocketIO MGT User Guide
UG076 (v4.1) November 2, 2008
R
"PMA Receive Clocks"
"PMA Receive Clocks"
2.
"PMA
"Resets" in