Xilinx Virtex-4 RocketIO User Manual page 190

Chapter 7: Simulation and Implementation
Table 7-9: Bonded Out MGTCLK Sources for XC4VFX100
Table 7-10: Bonded Out MGTCLK Sources for XC4VFX140
190
XC4VFX100-FF1152
LOC Constraint
MGTCLK
GT11CLK_X0Y0 –
GT11CLK_X0Y1 105
GT11CLK_X0Y2
–
GT11CLK_X0Y3 102
GT11CLK_X0Y4 –
GT11CLK_X1Y0 –
GT11CLK_X1Y1 110
GT11CLK_X1Y2 –
GT11CLK_X1Y3 113
GT11CLK_X1Y4 –
XC4VFX140-FF1517
LOC Constraint
MGTCLK
GT11CLK_X0Y0 –
GT11CLK_X0Y1 105
GT11CLK_X0Y2 –
GT11CLK_X0Y3
–
GT11CLK_X0Y4 102
GT11CLK_X1Y0 –
GT11CLK_X1Y1
110
GT11CLK_X1Y2 –
GT11CLK_X1Y3 –
GT11CLK_X1Y4 113
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CLKN CLKP MGTCLK
– –
AP28 AP29
– –
N34 M34
– –
– –
AP4 AP3
– –
K1 J1
– –
CLKN CLKP
– –
AW33 AW34
– –
– –
G39 F39
– –
AW7 AW6
– –
– –
G1 F1
Virtex-4 RocketIO MGT User Guide
XC4VFX100-FF1517
CLKN CLKP
– – –
105 AW33 AW34
– – –
102 G39 F39
– – –
– – –
110 AW7 AW6
– – –
113 G1 F1
– – –
UG076 (v4.1) November 2, 2008
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