Chapter 11: Design Of Transitions; Excess Capacitance And Inductance; Time Domain Reflectometry (Tdr) - Xilinx Virtex-4 RocketIO User Manual

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Design of Transitions
Transmission lines have defined and controlled characteristic impedance along their
length by definition. However, the transitions — i.e., the three-dimensional structures to
which they interface — do not have constant or easily defined impedance along the signal
path. Software tools such as 3D field-solvers are necessary for computing the impedance
that a multi-gigahertz signal sees as it passes through these structures, while 2D field-
solvers are sufficient for computing transmission line characteristic impedance.
PCB designers can use the analyses and examples in this section to greatly accelerate the
design of such a channel. Cases not covered in this section might need further simulation
and board iterations.

Excess Capacitance and Inductance

Most differential transitions are overly capacitive. The P and N paths couple to each other,
increasing capacitance. Many transitions have a frequency response identical to that of a
lumped capacitor over a wide frequency band.
By design, spreading conductors and clearing away reference planes reduces this excess
capacitance. In many cases, only limited optimization is possible due to density concerns
and physical limitations. While techniques such as blind vias, solder balls on a larger pitch,
and very small via pads reduce capacitance, they are not always feasible in a design due to
a variety of reasons.
Time domain reflectometry (TDR) techniques, either through simulation or measurement,
allow the designer to identify excess capacitance or excess inductance in a transition.

Time Domain Reflectometry (TDR)

To make TDR measurements, a step input is applied to the interconnect. The location and
magnitude of the excess capacitance or inductance that the voltage step experiences as it
traverses the interconnect can be determined through observing the reflected signal.
A shunt capacitance (see
series inductance (see
polarity. Td is assumed to be the propagation delay through the first transmission line
segment on the left. The reflected wave due to the impedance discontinuity takes 2 * Td to
return to the TDR port. If the signal propagation speed through the transmission line is
known, the location of the excess capacitance or inductance along the channel can be
calculated.
Virtex-4 RocketIO MGT User Guide
UG076 (v4.1) November 2, 2008
Figure 11-1) causes a momentary dip in the impedance, while a
Figure 11-2) causes an impedance discontinuity in the opposite
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Chapter 11
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