Xilinx Virtex-4 RocketIO User Manual page 44

Chapter 1: RocketIO Transceiver Overview
Table 1-6: RocketIO MGT PCS Ports (Continued)
Port
8B/10B
RXCHARISK
RXCHARISCOMMA
RXDEC8B10BUSE
RXDISPERR
RXNOTINTABLE
RXRUNDISP
TXBYPASS8B10B
TXCHARDISPMODE
TXCHARDISPVAL
44
I/O Port Size
If 8B/10B decoding is enabled, it indicates that the received
data is a "K" character when asserted. (See
O 8 for association with RX data.) If 8B/10B decoding is bypassed,
it becomes the last bit received (Bit "j") of the 10-bit encoded
data.
Indicates the reception by the 8B/10B decoder of K28.1, K28.5,
K28.7 (see
O 8
and some out-of-band commas (depending on the setting of
DEC_VALID_COMMA_ONLY).
If set to a logic 1, the 8B/10B decoder is used. If set to a logic 0,
I 1
the 8B/10B decoder is bypassed.
If 8B/10B encoding is enabled, it indicates whether a disparity
O 8 error has occurred on the serial line. Included in byte-mapping
scheme. (See
Status bits are raised to logic 1 when a received 10-bit-encoded
data symbol is not found in the encode/decode table. When
an RXNOTINTABLE status bit is asserted, the raw undecoded
O 8
10-bit symbol corresponding to that bit is delivered to the
fabric instead of a decoded character. See
for association with RX data.
Signals the running disparity (0 = negative, 1 = positive) in the
received serial data. See
O 8 with RX data. If 8B/10B encoding is bypassed, it remains as
the second-to-last bit received (Bit "h") of the 10-bit encoded
data.
When asserted, signals the 8B/10B encoder to not encode the
associated data. See
I 8
RX data. See
for other details.
If 8B/10B encoding is enabled, this bus determines what mode
of disparity is to be sent. (See
association with RX data.) When 8B/10B is bypassed, this
I 8 becomes the last bit transmitted (Bit "j") of the 10-bit encoded
TXDATA bus section (see
specified by the byte-mapping. The bits have no meaning if
TXENC8B10BUSE is set to a logic 0.
If 8B/10B encoding is enabled, this bus determines what type
of disparity is to be sent. (See
association with RX data.) When 8B/10B is bypassed, this
I 8 becomes the second to last bit transmitted (Bit "h") of the 10-
bit encoded TXDATA bus section (see
for each byte specified by the byte-mapping section. The bits
have no meaning if TXENC8B10BUSE is set to a logic 0.
www.xilinx.com
Definition
Table 1-15, page 60 for association with RX data),
Table 1-15, page 60 for association with RX data.)
Table 1-15, page 60
Table 1-15, page 60
Chapter 3, "PCS Digital Design Considerations,"
Table 1-15, page 60
Figure 3-10, page
Table 1-15, page 60
Virtex-4 RocketIO MGT User Guide
UG076 (v4.1) November 2, 2008
R
Table 1-15, page 60
Table 1-15, page 60
for association
for association with
for
111) for each byte
for
Figure 3-10, page 111)