Xilinx Virtex-4 RocketIO User Manual page 272

Appendix A: RocketIO Transceiver Timing Model
Table A-1: MGT Clock Descriptions (Continued)
272
CLOCK SIGNAL
Clock used for reading the RX ring buffer. Clocks CHBONDI and
RXUSRCLK CHBONO into and out of the transceiver. Typically the same as
TXUSRCLK.
Clocks receiver data and status between the transceiver and the
FPGA core. Typically the same as TXUSRCLK2. Relationship between
RXUSRCLK2
RXUSRCLK2 and RXUSRCLK depends on width of receiver data
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DESCRIPTION
Virtex-4 RocketIO MGT User Guide
UG076 (v4.1) November 2, 2008
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