Event Register; Enable Register; Status Byte Register - Agilent Technologies 4294A Programming Manual

Precision impedance analyzer
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Event register

Reflects the correspondent condition of the 4294A (e.g. occurrence of an event) as a bit
status. These bits monitor the changing 4294A's state continuously and change bit status
when the condition (e.g. change bit status to "1" if a specific event occurs) for each bit is
met. You cannot change bit status by GPIB command.
4294A has the following event registers:
Instrument Event Status Register (See Table B-3 for details)
Standard Event Status Register (See Table B-2 for details)
Operation Status Event Register (See Table B-4 for details)

Enable register

Setting the enable register allows you to specify event register bits which can set "1" to the
summary bit of the status byte register when an event occurs. The register bits work like
mask bits; setting "1" to an enable register will enable a corresponding bit in the event
register.
For example, when you want to set "1" the summary bit in the status byte register by a
specific register condition, set the corresponding enable register to "1".

Status byte register

If the enabled event register is set to "1", a corresponding bit of the status byte register is
also set to "1". This register also indicates the output queue and SRQ status.
The value of the status byte register can be read by using the "*STB?" command on page
261 or serial poll (SPOLL statement in HP BASIC) from the controller. The "*STB?" sets
the analyzer to remote mode. On the other hand, the SPOLL statement in HP BASIC reads
the status byte register value directly without the instrument being set to remote. Therefore,
you can continue to operate front panel keys while a controller is reading the status byte
register.
Reading the status byte register by the "*STB?" command does not affect the contents of
the status byte register. However, reading with the SPOLL statement of HP BASIC will
clear the RQS bit in the status byte register.
Table B-1 shows the contents of the status byte register for the 4294A. A serial poll
initiated by using the SPOLL command reads bit 6 of the status byte register as the RQS
bit. The "*STB?" command reads bit 6 as the MSS bit. See Table B-1 for details on RQS
and MSS bits.
SRQ (Service Request) can be generated linking with the status byte register by setting the
service request enable register.
Appendix B
Status Reporting System
General Status Register Model
475

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