Delta AS Series Programming Manual page 1182

Explanation
1. If you specify the rising-edge trigger at X0.5 as the condition for Z phase input in HWCONFIG, the count is
incremented once whenever the rising-edge trigger at X0.5 occurs.
2. Y1.4 is specified as the output point for outputting the clear signal in HWCONFIG.
3. S is set as 16#FE0C000E.
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High 16-bit [0002] is to search for the Z phase twice, once the axis moves away from the DOG signal.
Low 16-bit [0007] is Mode 7; when the DOG signal is received, the axis moves in the negative direction; after the
axis moves away from the DOG signal, and found the Z phase, a clear signal is outputted (20ms).
Example 3
When M0 is ON, outputting the pulse from Y0.0 with a frequency of 20 kHz to search for the zero point in the negative
direction. When the DOG signal is received and X0.4 is ON, the PLC decreases the frequency to the JOG frequency of 1
kHz and keeps moving in the positive directon with the JOG frequency of 1 kHz. When X0.4 is OFF, the axis starts to
move after 500 pluse output completes in the negative direction. Y1.4 outputs a 20ms-width pulse and then stops
outputting.
Explanation
1. Y1.4 is specified as the output point for outputting the clear signal in HWCONFIG.
2. S is set as 16#FE0C000E.
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High 16-bit [FE0C=-500] once the axis moves away from the DOG signal. The axis starts to move after 500 pluse
output completes in the negative direction.
Low 16-bit [000E] is Mode 14; when the DOG signal is received, the axis moves in the positive direction; after the
axis moves away from the DOG signal, a clear signal is outputted (20ms).
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