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RZ Family / RZ/G, RZ/A Series
2.11
SD/MMC Host Interface
2.11.1
eMMC Memory
Figure 2.13 shows a block diagram of the MMC interface.
The eMMC memory is connected to channel 0 of SD/MMC interface that is with built-in to the RZ/G2UL. This
memory is used in conjunction with SD card.
The eMMC memory may be used when
●
the SW_SD0_DEV_SEL is enabled (SW1-2: Selection SD/MMC is OFF).
This interface complies with the JEDEC standard version 4.51 and supports HS200 mode.
RZ/G2UL, RZ/A3UL, RZ/Five
SD0_PVDD
SD0_RST_N
SD0_CLK
SD0_CMD
SD0_DATA0
SD0_DATA1
SD0_DATA2
SD0_DATA3
RZ/G2UL, RZ/A3UL, RZ/Five
SD0_PVDD
SD0_PVDD
SD0_DATA4
SD0_DATA5
SD0_DATA6
SD0_DATA7
Figure 2.13
Block Diagram of eMMC I/F
R01UH0990EJ0101
Rev.1.01
Jul 28, 2022
RZ/G2UL SMARC Module Board
RZ/Five SMARC Module Board
2. Functional Specifications
RZ/A3UL SMARC Module Board
QSPI Edition
RZ/A3UL SMARC Module Board
OCTAL Edition
Page 55 of 83
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