Toshiba H1 Series Data Book page 732

32bit micro controller tlcs-900/h1 series
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(12) DMAC (6/7)
Symbol
Name
Address
0950H
DMA
source
HDMAS5
0951H
address
Register5
0952H
0954H
DMA
destination
HDMAD5
0955H
address
Register5
0956H
0958H
DMA
Transfer
HDMACA5
count
number A
Register5
0959H
095AH
DMA
Transfer
HDMACB5
count
number B
Register5
095BH
DMA
transfer
HDMAM5
095CH
Mode
Register5
7
6
5
D5SA7
D5SA6
D5SA5
0
0
0
D5SA15
D5SA14
D5SA13
0
0
0
D5SA23
D5SA22
D5SA21
0
0
0
D5DA7
D5DA6
D5DA5
0
0
0
Destination address for DMA5 (7:0)
D5DA15
D5DA14
D5DA13
0
0
0
Destination address for DMA5 (15:8)
D5DA23
D5DA22
D5DA21
0
0
0
Destination address for DMA5 (23:16)
D5CA7
D5CA6
D5CA5
0
0
0
D5CA15
D5CA14
D5CA13
0
0
0
D5CB7
D5CB6
D5CB5
0
0
0
D5CB15
D5CB14
D5CB13
0
0
0
92CZ26A-729
4
3
D5SA4
D5SA3
R/W
0
0
Source address for DMA5 (7:0)
D5SA12
D5SA11
R/W
0
0
Source address for DMA5 (15:8)
D5SA20
D5SA19
R/W
0
0
Source address for DMA5 (23:16)
D5DA4
D5DA3
R/W
0
0
D5DA12
D5DA11
R/W
0
0
D5DA20
D5DA19
R/W
0
0
D5CA4
D5CA3
R/W
0
0
Transfer count A [7:0] for DMA5
D5CA12
D5CA11
R/W
0
0
Transfer count A [15:8] for DMA5
D5CB4
D5CB3
R/W
0
0
Transfer count B [7:0] for DMA5
D5CB12
D5CB11
R/W
0
0
Transfer count B [15:8] for DMA5
D5M4
D5M3
0
0
DMA transfer mode
000: Destination INC (I/O → MEM)
001: Destination DEC (I/O → MEM)
010: Source INC (MEM → I/O)
011: Source DEC (MEM → I/O)
100: Source/destination INC
(MEM → MEM)
101: Source/destination DEC
(MEM → MEM)
110: Source/destination fixed
(I/O→ I/O)
111: Reserved
TMP92CZ26A
2
1
0
D5SA2
D5SA1
D5SA0
0
0
0
D5SA10
D5SA9
D5SA8
0
0
0
D5SA18
D5SA17
D5SA16
0
0
0
D5DA2
D5DA1
D5DA0
0
0
0
D5DA10
D5DA9
D5DA8
0
0
0
D5DA18
D5DA17
D5DA16
0
0
0
D5CA2
D54CA1
D5CA0
0
0
0
D5CA10
D5CA9
D5CA8
0
0
0
D5CB2
D5CB1
D5CB0
0
0
0
D5CB10
D5CB9
D5CB8
0
0
0
D5M2
D5M1
D5M0
R/W
0
0
0
Transfer data size
00: 1 byte
01: 2 bytes
10: 4 bytes
11: Reserved

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