Toshiba H1 Series Data Book page 589

2. Disabling the timer
Carry of a timer is prohibited when write "0" to PAGER<ENATMR> and can
prevent malfunction by 1s Carry hold circuit. During a timer prohibited, 1s Carry
hold circuit holds one sec. carry signal, which is generated from divider. After
becoming timer enable state, output the carry signal to timer and revise time and
continue operation. However, timer is late when timer-disabling state continues
for one second or more. During timer disabling, pay attention with system power
is downed. In this case the timer is stopped and time is delayed.
Figure 3.21.5 Flowchart of Clock disable
Start
Disable the clock
Read the clock data
Enable the clock
End
92CZ26A-586
TMP92CZ26A
Note:
This period is within
0.5 secound.