Toshiba H1 Series Data Book page 696

(3) Memory controller (1/4)
Symbol Name
Address
BLOCK0
CS/WAIT 0140H
B0CSL control (Prohibit
register RMW)
low
BLOCK0
CS/WAIT 0141H
B0CSH control (Prohibit
register RMW)
high
BLOCK1
CS/WAIT 0144H
B1CSL control (Prohibit
register RMW)
low
BLOCK1
CS/WAIT 0145H
B1CSH control (Prohibit
register RMW)
high
BLOCK2
CS/WAIT 0148H
B2CSL control (Prohibit
register RMW)
low
BLOCK2
CS/WAIT 0149H
B2CSH control (Prohibit
register RMW)
high
7 6 5
B0WW3 B0WW2 B0WW1
0 0
Write waits
0001: 0 waits 0010: 1 wait
0101: 2 waits 0110: 3 waits
0111: 4 waits 1000: 5 waits
1001: 6 waits 1010: 7 waits
1011: 8 waits 1100: 9 waits
1101: 10 waits 1110: 12 waits
1111: 16 waits 0100: 20 waits
0011: 6 states +
pin input mode
WAIT
Others: Reserved
B0E
R/W
0
CS select
0: Disable
1: Enable
B1WW3 B1WW2 B1WW1
0 0
Write waits
0001: 0 waits 0010: 1 waits
0101: 2 waits 0110: 3 waits
0111: 4 waits 1000: 5 waits
1001: 6 waits 1010: 7 waits
1011: 8 waits 1100: 9 waits
1101: 10 waits 1110: 12 waits
1111: 16 waits 0100: 20 waits
0011: 6 states +
pin input mode
WAIT
Others: Reserved
B1E
R/W
0
CS select
0: Disable
1: Enable
B2WW3 B2WW2 B2WW1
0 0
Write waits
0001: 0 waits 0010: 1 waits
0101: 2 waits 0110: 3 waits
0111: 4 waits 1000: 5 waits
1001: 6 waits 1010: 7 waits
1011: 8 waits 1100: 9 waits
1101: 10 waits 1110: 12 waits
1111: 16 waits 0100: 20 waits
0011: 6 states +
pin input mode
WAIT
Others: Reserved
B2E B2M
R/W
1 0
CS select 0: 16 MB
0: Disable 1: Sets
1: Enable area
92CZ26A-693
4 3
B0WW0 B0WR3
R/W
1 0 0
Read waits
0001: 0 waits
0101: 2 waits
0111: 4 waits
1001: 6 waits
1011: 8 waits
1101: 10
1111: 16
0011: 6 states +
Others: Reserved
B0REC B0OM1
0 0
Dummy 00: ROM/SRAM
cycle 01: Reserved
0:No insert 10: Reserved
1: Insert 11: Reserved
B1WW0 B1WR3
R/W
1 0 0
Read waits
0001: 0 waits
0101: 2 waits
0111: 4 waits
1001: 6 waits
1011: 8 waits
1101: 10
1111: 16
0011: 6 states +
Others: Reserved
B1REC B1OM1
0 0
Dummy 00: ROM/SRAM
cycle 01: Reserved
0:No 10: Reserved
insert 11: SDRAM
1: Insert
B2WW0 B2WR3
R/W
1 0 0
Read waits
0001: 0 waits
0101: 2 waits
0111: 4 waits
1001: 6 waits
1011: 8 waits
1101: 10
1111: 16
0011: 6 states +
Others: Reserved
B2REC B2OM1
0 0
Dummy 00: ROM/SRAM
cycle 01: Reserved
0:No 10: Reserved
insert 11: SDRAM
1: Insert
TMP92CZ26A
2 1
B0WR2 B0WR1 B0WR0
0 1
0010: 1 wait
0110: 3 waits
1000: 5 waits
1010: 7 waits
1100: 9 waits
waits 1110: 12 waits
waits 0100: 20 waits
pin input mode
WAIT
B0OM0 B0BUS1 B0BUS0
R/W
0 0
Data bus width
00: 8 bits
01: 16 bits
10: Reserved
11: Don't set
B1WR2 B1WR1 B1WR0
0 1
0010: 1 waits
0110: 3 waits
1000: 5 waits
1010: 7 waits
1100: 9 waits
waits 1110: 12 waits
waits 0100: 20 waits
pin input mode
WAIT
B1OM0 B1BUS1 B1BUS0
R/W
0 0
Data bus width
00: 8 bits
01: 16 bits
10: Reserved
11: Don't set
B2WR2 B2WR1 B2WR0
0 1
0010: 1 waits
0110: 3 waits
1000: 5 waits
1010: 7 waits
1100: 9 waits
waits 1110: 12 waits
waits 0100: 20 waits
pin input mode
WAIT
B2OM0 B2BUS1 B2BUS0
R/W
0 0
Data bus width
00: 8 bits
01: 16 bits
10: Reserved
11: Don't set
0
0
0
0
0
0
1