Toshiba H1 Series Data Book page 206

(2) Note the NAND flash area setting
Figure 3.8.8 shows a memory map for NAND flash.
And since CS3 area is recommended to assign address from 000000H to 3FFFFFH, this
case is explained.
In this case, "NAND flash" and CS3 area are overlapped. But
active by setting BROMCR<CSDIS> to "1". And also
to
CSZA CSZD
Note1: In this case, the address from 000000H to 049FFFH of 296 Kbytes in CS3's memory can't be used.
Note2: 16 byte area (001FF0H to 001FFFH) for NAND Flash are fixed like a following without relationship to
setting CS bock. Therefore, NAND flash area don't according to CS3 area setting.
(NAND-Flash area specification)
1. bus width
2.WAIT control
pins don't become to active.
: Depend on NDFMCR1<BUSW> in NAND Flash controller.
: Depend on NDFMCR<SPLW1:0>,<SPHW1:0> in NAND Flash controller
000000H
Internal I/O
001FF0H
NAND flash
(16 bytes)
002000H
Internal RAM
(288 Kbytes)
04A000H
COMMON X
(2 Mbytes)
200000H
LOCAL X
(2 Mbytes)
400000H
Figure 3.8.8 Recommended CS3 setting
92CZ26A-203
TMP92CZ26A
pin don't become
CS 3
to , ,
CS 0 CS 3 SDCS CSXA
All CS pins become to unactibe
by BROMCR<CSDIS> = "1"
CS3 area setting
000000H to 3FFFFFH (4 Mbytes)
to ,
CSXB