Toshiba H1 Series Data Book page 496

(5) SPITD (SPI Transmit Data Register)
SPITD0, SPITD1 registers are for writing transmitted data.
7
bit Symbol
TXD7
SPITD0
(830H)
Read/Write
After reset
Function
15
bit Symbol
TXD15
(831H)
Read/Write
After reset
Function
7
bit Symbol
TXD7
SPITD1
(832H)
Read/Write
After reset
Function
15
bit Symbol
TXD15
(833H)
Read/Write
After reset
Function
This bit is for writing transmitted data. When read, the last written data is read. The data is
overwritten if write next data with transmit FIFO is not empty.
Transmit register exist 4bytes. Therefore, it is possible writing by using 4byte instruction
(use DMA together it etc.)
However, when write data (Destination address), writing the data from 830 addresses is
always needed.
Method of writing data (instruction) is restricted. Please refer to following table.
Transmit
data
write size
1byte write ld (0x830),a
2byte write ld (0x830),wa
4byte write ld (0x830),xwa
○: All data that written by CPU is transmitted
×: Invalid data that except for written by CPU is transmitted
SPITD0 Register
6 5
TXD6 TXD5
0 0 0
14 13
TXD14 TXD13
0 0 0
SPITD1 Register
6 5
TXD6 TXD5
0 0 0
14 13
TXD14 TXD13
0 0 0
Figure 3.17.12 SPITD Register
Instruction UNIT transmission
example (No using FIFO)
1byte
transmission
<unit16>=0
○
×
×
92CZ26A-493
4 3
TXD4 TXD3
R/W
0 0
Transmit data register [7:0]
12 11
TXD12 TXD11
R/W
0 0
Transmit data register [15:8]
4 3
TXD4 TXD3
R/W
0 0
Transmit data register [7:0]
12 11
TXD12 TXD11
R/W
0 0
Transmit data register [15:8]
Sequential transmission
2 byte
transmission transmission
<unit16>=1 <unit16>=0
×
○
×
TMP92CZ26A
2 1 0
TXD2 TXD1 TXD0
0 0 0
10 9 8
TXD10 TXD9 TXD8
0 0 0
2 1 0
TXD2 TXD1 TXD0
0 0 0
10 9 8
TXD10 TXD9 TXD8
0 0 0
(Using FIFO)
1 byte 2 byte
transmission
<unit16>=1
×
Prohibit
○ ○
○ ○