3.26.1.2
Data Registers
The data registers are arranged as shown below.
Bits<63:56>
Bits<55:48>
Multiplier A
Register
Multiplier B
Register
MAC
Register
(1BEFH)
Note 1: After reset, all the registers are cleared to "0".
Note 2: Read-modify-write instructions can be used on all the registers.
Note 3: All the registers can be accessed in long word, word, or byte units.
Note 4: When MACCR<MSTTG2:0> is set to "0", "001", "010" or "011" and the registers are written in word or byte units, the
<7:0> bits of each register must be written last.
Note 5: The MACORL register is fixed one system clock (f
two system clocks (f
calculation, be sure to read the MACORL register first.
Bits<47:40>
Bits<39:32>
MACORH
(1BEEH)
(1BEDH)
(1BECH)
) after calculation is started. Therefore, to read the MACOR register immediately after
SYS
92CZ26A-629
Data Registers
Bits<31:24>
Bits<23:16>
(1BE3H)
(1BE2H)
(1BE7H)
(1BE6H)
(1BEBH)
(1BEAH)
) after calculation is started, and the MACORH register is fixed
SYS
TMP92CZ26A
Bits<15:8>
Bits<7:0>
MACMA
(1BE1H)
(1BE0H)
MACMB
(1BE5H)
(1BE4H)
MACORL
(1BE9H)
(1BE8H)