Toshiba H1 Series Data Book page 199

(c) External read bus cycle (1 wait + TAC: 1f
External write bus cycle (1 wait + TAC: 1f
SDCLK
(80 MHz)
CSn TAC
A23 to 0
RD SRxxB
D15 to 0
SRWR , SRxxB
WRxx
D15 to 0
WAIT
(d) External read/write cycle (4 waits +
SDCLK
(80 MHz)
CSn
A23 to 0
RD SRxxB
D15 to 0
SRWR , SRxxB
WRxx
D15 to 0
WAIT
T1 T2 T3
TCRS
TCWS
TCWS
T1 T2 T3
92CZ26A-196
+ TCRS: 1.5f
SYS SYS
+ TCWS/H: 1.5f
SYS
T4 T5
TCRH
Input
TCWH
TCWH
Output
pin input mode)
WAIT
T4 T5
Output
Sampling
TMP92CZ26A
+ TCRH: 1f
)
SYS
)
SYS
T6
TAC
Read
Write
T6
Read
Input
Write