Toshiba H1 Series Data Book page 444

32bit micro controller tlcs-900/h1 series
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IDLE
Receive OUT token
Confirm Token packet
• PID
• Address
• Endpoint
• Transfer mode
• Error
OK
Confirm Status
Confirming STATUS register (status)
OK
Confirm DATA PID
• Time out
• Error
OK
Receiving data
• Error
• Receive receiving data
IDLE
Receive SOF
Not receive SOF
Not renew frame number
loss data
Figure 3.16.14 Control Flow in UDC (Isochronous transfer type (Receiving))
Error
Error, time out exept data PID
Receive SOF nothing
transmitting data
Error, receiving data more than payload.
Error transaction
Set STATUS to RX ERR
• Frame no read
• Shift BANK
Shift FIFO BANK
every receive SOF
92CZ26A-441
Invalid
Clear X Condition (A)
BANK B transaction
Assert SOF
Set data size received preceding frame to
DATASIZE register in BANK A
Set BANK A bit in DATASET register
Clear BANK B bit in DATASET register
Set STATUS to DATAIN
(But if error generate, set RX_ERR)
BANK A transaction
Assert SOF
Set data size received preceding frame to
DATASIZE register in BANK B
Set BANK B bit in DATASET register
Clear BANK A bit in DATASET register
Set STATUS to DATAIN
(But if error generate, set RX_ERR)
TMP92CZ26A

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