Toshiba H1 Series Data Book page 361

32bit micro controller tlcs-900/h1 series
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b. Slave Mode
SCL pin
SDA pin
Start condition
<PIN>
INTSBI
interrupt request
Output of master
Output of slave
Figure 3.15.14 Start condition generation and slave address transfer
In the Slave Mode, the start condition and the slave address are received.
After the start condition is received from the master device, while eight clocks are
output from the SCL pin, the slave address and the direction bit that are output
from the master device are received.
When a GENERAL CALL or the same address as the slave address set in I2CAR
is received, the SDA line is pulled down to the Low-level at the 9th clock, and the
acknowledge signal is output.
An INTSBI interrupt request occurs on the falling edge of the 9th clock. The
<PIN> is cleared to "0". In Slave Mode the SCL line is pulled down to the
Low-level while the <PIN> = "0".
1
2
3
A6
A5
A4
Slave address + Direction bit
92CZ26A-358
4
5
6
A3
A2
A1
TMP92CZ26A
7
8
9
A0
R/
ACK
W
Acknowledge
signal from a
slave device

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