Table of Contents
Advertisement
3.25.1 SFR
bit symbol
PCM_ON
PMCCTL
Read/Write
(02F0H)
After
system
reset
After hot
reset
Power
Cut Mode
Function
0: Disable
1: Enable
Note: After wake-up interruption, internal wake-up timer count setting register value:<WUTM1:0>, and after about
77us, external PWE terminal change from low level to high level. Additionally after more about 92us, internal
reset signal will be released. We recommend to confirm actual performance on final set, because the time to
be stable all voltage level and power supply circuit are difference characteristics every final set.
The following operations are affected by the setting of the <PCM_ON> bit.
External interrupt input
Operation after reset
Operation after hot reset
Warm-up counter
7
6
5
R/W
0
Data
retained
PCM_ON = 1
No interrupt
HOT_RESET signal assert
−
Startup from boot ROM regardless
of the AM1 and AM0 pins and
jump to internal RAM area.
A change in the PWE pin level is
used as a trigger to start counting
the
low-frequency
releasing HOT_RESET.
92CZ26A-620
4
3
Always
write "0"
Always
read as "0"
PCM_ON = 0
Interrupt
Startup depending on the AM1
and AM0 pins
Counter stopped
clock
for
TMP92CZ26A
2
1
0
−
WUTM1
WUTM0
W
R/W
R/W
0
0
0
Data
Data
−
retained
retained
Warm-up time
00: 29 (15.625 ms)
01: 210 (31.25 ms)
10: 211 (62.5 ms)
11: 212 (125 ms)
−
Advertisement
Table of Contents
