Toshiba H1 Series Data Book page 594

3.22.2 Control registers
ALM
bit Symbol
(1330H)
Read/Write
After reset
Function
MELALMC
bit Symbol
(1331H)
Read/Write
After reset
Function
Note1: MELALMC<FC1> is read always "0".
Note2: When setting MELALMC register except <FC1:0> during the free-run counter is running, <FC1:0> is kept "01".
MELFL
bit Symbol
(1332H)
Read/Write
After reset
Function
MELFH
bit Symbol MELON
(1333H)
Read/Write
After reset
Control
melody
counter
Function
0: Stop &
1: Start
ALMINT
bit Symbol
(1334H)
Read/Write
After reset
Function
Note: INTALM0 to INTALM4 prohibit that set to enable at same time. If setting to enable, set only 1.
7 6
AL8 AL7
0 0
MELALMC register
7 6
FC1 FC0 ALMINV
R/W R/W
0 0
Free-run counter Alarm
control
Wavefor
00: Hold m invert
01: Restart
1:INVERT
10: Clear
11: Clear & Start
MELFL register
7 6 5
ML7 ML6 ML5
0 0 0
Setting melody frequency (lower 8bit)
MELFH register
7 6 5
R/W
0
Clear
ALMINT register
7 6 5
−
R/W
0
Always
write "0"
ALM register
5 4 3
AL6 AL5 AL4
R/W
0 0 0
Setting alarm pattern
5 4 3
− −
R/W R/W
0 0 0
Always write "0"
4 3
ML4 ML3
R/W
0 0
4 3
ML11
0
Setting melody frequency(upper 4bit)
4 3
IALM4E IALM3E
0 0
1:INTALM4 1:INTALM3
(1Hz) (2Hz)
enable enable
92CZ26A-591
TMP92CZ26A
2 1
AL3 AL2
0 0
2 1
− −
MELALM
R/W R/W
0 0
Select
Output
Wavefor
m
0: Alarm
1: Melody
2 1
ML2 ML1 ML0
0 0
2 1
ML10 ML9 ML8
R/W
0 0
2 1 0
IALM2E IALM1E IALM0E
R/W
0 0 0
1:INTALM2 1:INTALM1 1:INTALM0
(64Hz) (512Hz) (8192Hz)
enable enable enable
0
AL1
0
0
R/W
0
0
0
0
0