Toshiba H1 Series Data Book page 210

32bit micro controller tlcs-900/h1 series
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Address memory map
000000H
Internal-I/O, RAM
COMMON-X
(2MB)
200000H
LOCAL-X
(2MB)
3FE000H
400000H
LOCAL-Y
(2MB)
600000H
COMMON-Y
(2MB)
800000H
LOCAL-Z
(4MB)
C00000H
COMMON-Z
(4MB)
FFFF00H
Vector area
FFFFFFH
Figure 3.9.3Recommendation memory map for simple system (Logical address)
Internal-I/O
and RAM
Internal Boot-ROM
Note: In case of connect SDRAM to Z-area, 64MB(4MB×16) is maximum
Figure 3.9.4 Recommendation memory map for simple system (Physical address)
ND
Internal Boot-ROM (8KB)
・・・ 15
Bank 0
1
2
3
pin
SDCS
64MB(4MB×16)
Note: In case of connect SDRAM to Z-area, 64MB (4MB
92CZ26A
000000H
3FE000H
92CZ26A-207
pin (512MB)
0
CE
pin (512MB)
ND
1
CE
Internal area
:
Overlapped with COMMON-Area and disabled setting as LOCAL-area.
:
×
16) is maximum
LOCAL-Z
SDCS
4MB×16=64MB
SDCS
Bank 0
15
TMP92CZ26A
Memory controller
setting
CS2-area
8MB

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