Toshiba H1 Series Data Book page 543

LCDCTL0 bit Symbol
(0285H)
Read/Write
After reset
PIP
function
0:Disable
1:Enable
Function
Note: When select STN mode, LCP0 is output at valid data only regardless of the setting of <LCP0OC> bit.
bit Symbol
LCDDVM0
Read/Write
(0283H)
After reset
Function
bit Symbol
LCDDVM1
Read/Write
(0284H)
After reset
Function
LCD Control 0 Register
7 6 5
PIPE ALL0 FRMON
R/W R/W R/W
0 0 0
Segment Frame
data divide
setting setting
0: Normal
1: Always 0: Disable
output "0" 1: Enable
Divide FRM 0 Register
7 6 5
FMP3 FMP2 FMP1
0 0 0
LCP0 DVM (bits 3-0) (M)
7 6 5
FMP7 FMP6 FMP5
0 0 0
LCP0 DVM (bits7-4) (M)
92CZ26A-540
4 3
–
DLS
R/W R/W
0
Always LFR signal
write "0" LCP0/line
selection
0:Line
1:LCP0
4 3
FMP0 FML3 FML2
R/W
0 0
LHSYNC DVM (bits 3-0) (N)
4 3
FMP4 FML7 FML6
R/W
0 0
LHSYNC DVM (bits 7-4) (N)
TMP92CZ26A
2 1 0
LCP0OC START
R/W R/W
0 0 0
LCDC
LCP0 (Note)
operation
0: Always
output
0: Stop
1: At valid
1: Start
data only
LLOAD
width
0: At setting
in register
1: At valid
data only
2 1 0
FML1 FML0
0 0 0
2 1 0
FML5 FML4
0 0 0