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bit Symbol
P97
P9
(0024H)
Read/Write
Data from external
After reset
bit Symbol
P9CR
(0026H)
Read/Write
After reset
Function
bit Symbol
P9FC
Read/Write
(0027H)
After reset
Function
bit Symbol
P9FC2
(0025H)
Read/Write
After reset
Always
write "0"
Function
bit Symbol
P97D
P9DR
Read/Write
(0089H)
After reset
Function
P92 setting
<P92C>
0
<P92F>
Input port,
0
CTS Input
0
1
Don't setting
Note 1: Read-modify-write is prohibited for P9CR, P9FC and P9FC2.
Note 2: When setting P96 pin to INT4 input, set P9DR<P96D> to "0" (prohibit input), and when driving P96 pin to "0", execute
HALT instruction. This setting generates INT4 inside. If don't using external interrupt in HALT condition, set like an
interrupt don't generated. (e.g. change port setting)
7
6
5
P96
R
port
Port 9 control register
7
6
5
Port 9 function register
7
6
5
P96F
W
0
0: Input
port
1: INT4
Port 9 Function registers 2
7
6
5
−
W
0
Port 9 drive register
7
6
5
P96D
R/W
1
1
Input/Output buffer drive register for standby mode
P91 setting
1
0
Input port,
port
Input
CTS Input
RXD0
0
Input
Don't setting
Figure 3.7.17 Register for Port 9
92CZ26A-132
Port 9 register
4
3
4
3
4
3
Refer to
following
table
4
3
Always
write "0"
4
3
P90 setting
<P91C>
1
<P90F>
Output port
TMP92CZ26A
2
1
0
P92
P91
P90
R/W
Data from external port (Output
latch register is set to "1")
2
1
0
P92C
P91C
P90C
W
0
0
0
Refer to following table
2
1
0
P92F
P90F
W
W
0
0
Refer to
following
table
2
1
0
−
P90F2
W
W
0
0
0:CMOS
1:
open-drain
2
1
0
P92D
P91D
P90D
R/W
1
1
1
<P90C>
0
0
Input port
Output port
Don't
TXD0
1
setting
Output
1
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