Toshiba H1 Series Data Book page 531

2. LHSYNC Signal
The period of the horizontal synchronization signal LHSYNC corresponds to one line
of display. The LHSYNC period is defined as an integral multiple of the reference
clock signal LCP0.
The LHSYNC period is defined as the product of the value set in LCDHSP<LH15:0 >
and the LCP0 clock period. The value to be set in LCDHSP<LH15:0 > should be
"segment size + number of dummy clocks" or larger for TFT. In the case of STN, the
minimum value of LCDHSP<LH15:0 > is:
Monochrome/grayscale
Color
LHSYNC [s: period] = LCP0 [s: period] × (<LH15:0> + 1)
LCDHSP
bit Symbol
(028AH)
Read/Write
After reset
Function
bit Symbol
(028BH)
Read/Write
After reset
Function
The enable width of the LHSYNC signal can be specified by LCDHSW<HSW9:0>. It
is also possible to set the delay time for the LVSYNC signal in units of LCP0 pulses.
(Enable width control)
(Delay control)
LCD LHSYNC Pulse Register
7 6 5
LH7 LH6 LH5
0 0 0
7 6 5
LH15 LH14 LH13
0 0 0
(Phase control)
92CZ26A-528
: (Segment size / 8) + number of dummy clocks
: (Segment size × 3 / 8) + number of dummy clocks
4 3
LH4 LH3
W
0 0
LHSYNC period (bits 7-0)
4 3
LH12 LH11
W
0 0
LHSYNC period (bits 15-8)
LHSYNC signal
TMP92CZ26A
2 1 0
LH2 LH1 LH0
0 0 0
2 1 0
LH10 LH9 LH8
0 0 0