Toshiba H1 Series Data Book page 547

32bit micro controller tlcs-900/h1 series
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STN 64-grayscale (1-pixel display data = 6-bit memory data)
Display Memory
Address 0
LSB
D0
0
1
2 3
4 5 6
Address 4
LSB
D0
32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
Address 8
LSB
D0
64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95
LD Bus Output
8-bit type
→ 53-48
LD0
5-0
→ 59-54
LD1
11-6
→ 65-60
LD2
17-12
→ 71-66
LD3
23-18
→ 77-72
LD4
29-24
→ 83-78
LD5
35-30
→ 89-84
LD6
41-36
→ 95-90
LD7
47-42
Figure 3.19.4 Memory Map Image and Data Output in STN 64-Grayscale Mode
Address 1
7
8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Address 5
Address 9
92CZ26A-544
Address 2
Address 6
Address 10
TMP92CZ26A
Address 3
MSB
D31
Address 7
MSB
D31
Address 11
MSB
D31

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