Toshiba H1 Series Data Book page 532

The enable width of the LHSYNC signal is set using LCDHSW<HSW8:0>. It can be
specified in a range of 1 to 512 pulses of the LCP0 clock.
The enable width is represented by the following equation:
Thus, when LCDHSW<HSW8:0> is set to "0", the enable width is set as one pulse of
the LCP0 clock.
Signal Name
LCP0
LHSYNC signal
bit Symbol
LCDHSW
(0294H) Read/Write
After reset
Function
LCDHWB8
bit Symbol
(0299H)
Read/Write
After reset
LGOE2 width (bits 9-8) LGOE1 width (bits 9-8)
Function
Enable width = <HSW8:0> + 1
LCP0 clock = 1, 2, 3 ... 512 pulses
LCDHSW Register
7 6 5
HSW7 HSW6 HSW5
0 0 0
7 6 5
O2W9 O2W8 O1W9
0 0 0
92CZ26A-529
High width setting
4 3
HSW4 HSW3 HSW2
W
0 0
LHSYNC width (bits 7-0)
4 3
O1W8 O0W8 LDW9
W
0 0
LGOE0 LLOAD width (bits 9-8)
width (bit 8)
TMP92CZ26A
2 1 0
HSW1 HSW0
0 0 0
2 1 0
LDW8 HSW8
0 0 0
LHSYNC
width (bit 8)