Write Cycle - Toshiba H1 Series Data Book

Write cycle

No. Parameter
D0 ~ D15 valid
16-1
→
WR
D0 ~ D15 valid
16-2
→
xx rising at 2 waits/4 waits
WR
17-1 xx low width at 0 waits
WR
xx low width at 2 waits/4 waits
17-2
WR
18 A0 ~ A23 valid →
xx falling → SDCLK rising
19
WR
→ A0 ~ A23 hold
xx rising
20 WR
→ D0 ~ D15 hold
xx rising
21
WR
→ D0 ~ D15 output
rising
RD
22-1
→ D0 ~ D15 output
22-2 rising
RD
23 Write width for SRAM
Data byte control ~ end of write
24
for SRAM
25 Address setup time for SRAM
26 Write recovery time for SRAM
27 Data setup time for SRAM
28 Data hold time for SRAM
AC measuring condition
Note:
The operation guarantee Temperature: 80MHz: Ta=0∼50°C, less than 60MHz: Ta=0∼70°C
Symbol
t
DW
xx rising at 0 waits
t
DW
t
DW4
t
DW6
t
WW
t
WW
t
WW4
t
WW6
t
falling
WR
AW
t
WK
t
WA
t
WD
t
RDO
t
RDO
t
RDO
t
RDO
t
SWP
t
SWP
t
SBW
t
SBW
t
SAS
t
SWR
t
SDS
t
SDS
t
SDH
92CZ26A-646
Variable
80MHz 60MHz Unit
Min Max
1.0T − 10.0
1.0T − 6.0
3.0T − 10.0
5.0T − 6.0
1.0T − 7.0
1.0T − 4.0
3.0T − 7.0
5.0T − 4.0
0.5T − 5.0
0.5T − 5.0
0.5T − 5.0
0.5T − 5.0
0.5T − 2.0
0.5T − 1.0
1.5T − 2.0
2.5T − 1.0
30.25
1.0T − 7.0
1.0T − 4.0
1.0T − 7.0
1.0T − 4.0
0.5T − 5.0
0.5T − 5.0
1.0T − 10.0
1.0T − 6.0
0.5T − 5.0
TMP92CZ26A
−
6.6
−
6.5
−
39.8
−
56.5
−
9.6
−
8.5
−
42.8
−
58.5
1.25 3.3
1.25 3.3
1.25 3.3
1.25 3.3
ns
−
6.3
−
5.25
−
22.9
−
−
9.6
−
8.5
−
9.6
−
8.5
1.25 3.3
1.25 3.3
−
6.6
−
6.5
1.25 3.3