Toshiba H1 Series Data Book page 598

3.23 Analog-Digital Converter (ADC)
This LSI has a 6-channel, multiplexed-input, 10-bit successive-approximation Analog-Digital
converter (ADC).
Figure 3.23.1 shows a block diagram of the AD converter.
The 6-analog input channels (AN0-AN5) can be used as general-purpose inputs.
Note1: Ensure that the AD converter has halted before executing HALT instruction to place the
TMP92CZ26A in IDLE2, IDLE1, STOP or PCM mode to reduce power consumption current.
Otherwise, the TMP92CZ26A might go into a standby mode while the internal analog
comparator is still enable state.
Note2: The power consumption current is reduced by setting ADMOD1<DACON> to "0" in the ADC
has been stopped.
ADMOD1
Channel
selection
control circuit
AN5 (PG5)
AN4 (PG4)
ADTRG, AN3 (PG3)
AN2 (PG2)
AN1 (PG1)
AN0 (PG0)
VREFH
VREFL
ADS
ADMOD0
ITM/LAT
Scan
repeat
End Busy
Normal AD
Converter Control
Circuit
Sample
Hold
VREF
Figure 3.23.1 ADC Block Diagram
Internal data bus
ADMOD2 ADMOD3
HTSEL/HHTRGE
TSEL/HTRGE
AD Monitor
Function control
Start
End Busy Start
High-Priority AD
Converter Control
+
−
Comparator
D/A Converter
92CZ26A-595
TMP92CZ26A
ADMOD4/5
AD start control
ADTRG
Compare register
1 and 2
Compare circuit
1&2
A / D Conversion
Result Register
ADREG0L~5L
ADREG0H~5H
High-Priority AD
Conversion
Result Register
ADREGSPH/L
AD Monitor function interrupt
INTADM
TRMB/ I2S
Complete interrupt AD
INTADHP
Normal AD Conversion
complete interrupt
INTAD