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4.3.11
SPI Controller
Parameter
SPCLK frequency ( = 1/S)
SPCLK rising time
SPCLK falling time
SPCLK low width
SPCLK high width
Output data valid → SPCLK rising
SPCLK rising/ falling
→ Output data hold
Input data valid
→ SPCLK rising/ falling
SPCLK rising/ falling
→ Input data valid
AC measuring condition
• Clock of top column in above table shows system clock frequency, and "S" in "Variable" show
SPCLK clock cycle [ns].
• C
= 25 pF
L
SPCLK Output
(at SPIMD<TCPOL,RCPOL> = "11")
SPCLK Output
(at SPIMD<TCPOL,RCPOL> = "00")
SPDO Output
SPDI Input
Variable
Symbol
Min
f
PP
t
r
t
f
0.5S − 6
t
WL
0.5S − 6
t
WH
0.5S − 18
t
ODS
0.5S − 10
t
ODH
t
5
IDS
t
5
IDH
f
PP
t
0.7 V
f
CC
0.2V
CC
t
r
92CZ26A-663
80MHz 60 MHz
Max
20
20
15
6
6
6
6
6
6
19
28
19
28
7
15
15
23.4
5
5
5
5
t
WL
t
WH
t
t
ODS
ODH
t
t
IDH
IDS
TMP92CZ26A
Unit
MHz
ns
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