Toshiba H1 Series Data Book page 305

32bit micro controller tlcs-900/h1 series
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3.13.3 SFR
Bit symbol
TB0RDE
TB0RUN
Read/Write
(1180H)
After Reset
Double
buffer
Function
0: disable
1: enable
Count operation
<TB0PRUN>, <TB0RUN>
Note: The 1, 4 and 5 of TB0RUN are read as "1" value.
Bit symbol
TB1RDE
TB1RUN
(1190H)
Read/Write
After Reset
Double
buffer
Function
0: disable
1: enable
Count operation
<TB1PRUN>, <TB1RUN>
Note: The 1, 4 and 5 of TB1RUN are read as "1" value.
TMRB0 RUN Register
7
6
5
R/W
R/W
0
0
Always
write "0"
TMRB1 RUN Register
7
6
5
R/W
R/W
0
0
Always
write "0"
Figure 3.13.3 Register for TMRB (1)
92CZ26A-302
4
3
I2TB0
R/W
0
In IDLE2
mode
0: Stop
1: Operate
0
Stop and clear
1
Count up
4
3
I2TB1
R/W
0
In IDLE2
mode
0: Stop
1: Operate
0
Stop and clear
1
Count up
TMP92CZ26A
2
1
TB0PRUN
TB0RUN
R/W
0
TMRB0
Up counter
prescaler
(UC10)
0: Stop and clear
1: Run (Count up)
2
1
TB1PRUN
TB1RUN
R/W
0
TMRB1
Up counter
prescaler
(UC12)
0: Stop and clear
1: Run (Count up)
0
R/W
0
0
R/W
0

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