Toshiba H1 Series Data Book page 134

Reset
Direction
control
(on bit basis)
P9CRwrite
Function
control
(on bit basis)
P9FCwrite
S
Output latch
P9 write
SCLK0 output
P9 read
Reset
Function
control
P9FC write
P9 read
Rising/Falling
INT4
edge-ditection
IIMC<I4EDGE>
A S
Selector
B
S
B
Selector
A
RXD0 input
SCLK0 input
input
CTS 0
Figure 3.7.15 P91, 92
TSICR0<PXEN>
<PYEN>
TSICR0<TSI7>
TSICR1<DBC7>
S
A
Selector
B
TSICR0<TWIEN , TSI7>
TSICR0<PXEN>
TSICR0<TSI7>
Figure 3.7.16 Port 96,97
92CZ26A-131
P91(RXD0)
P92(SCLK0,
AVCC
Switch for TSI
typ.10 Ω
P96 (INT4,PX)
P97 (PY)
Only for P96
De-bounce
Circuit
Pull-down resistor
typ.50K Ω
TMP92CZ26A
CTS )
0