Toshiba H1 Series Data Book page 118

Table3.7.2 I/O Port and Specifications (3/4)
Port Pin name
Port G PG0 to PG5
PG3
PG2
PG3
Port J PJ5 to PJ6
PJ5 to PJ6
PJ0 to PJ4,
PJ7
PJ0
PJ1
PJ2
PJ3
PJ4
PJ5
PJ6
PJ7
Port K PK0 to PK7
PK0
PK1
PK2
PK3
PK4
PK5
PK6
PK7
Port L PL0 to PL7
PL0 to PL7
Port M PM1 to PM2
PM1
PM2
PM7
Port N PN0 to PN7
Port P PP1 to PP5
PP1 to PP5
PP6 to PP7
PP1
PP2
PP3
PP4
PP5
PP6
PP7
Note: Case of using touch screen
Specification
Input port
AN0 to AN5 Input
ADTRG Input
MX Output Note:
MY Output Note:
Input port
Output port
Output port
SDRAS , SRLLB Output
SDCAS , SRLUB Output
SDWE , SRWR Output
SDLLDQM Output
SDLUDQM Output
NDALE Output
NDCLE Output
SDCKE Output
Output port
LCP0 output
LLOAD output
LFR output
LVSYNC output
LHSYNC output
LGOE0 output
LGOE1 output
LGOE2 output
Output port
LD0 to LD7 Output
Output port
TA1OUTOutput
MLDALM Output
MLDALM Output
ALARM Output
PWE Output
Input port
Output port (CMOS Output)
KO Output (Open-drain Output)
Input port
Output port
Output port
TA3OUT output
TA5OUT output
INT5 input
TA7OUT output
INT6 input
TB0IN0 input
INT7 input
TB1IN0 input
TB0OUT0 output
TB1OUT1 output
92CZ26A-115
TMP92CZ26A
X: Don't care
I/O register
Pn PnCR PnFC PnFC2
0
X None
1
0
X 0 0
X 1 0
X None 0
X 1
X 1
X None 1
X 1
X 1
X
1 1
X
X None 1
X 0
X 1
X 1
X 1
None
X 1
X 1
X 1
X 1
X 1
X 0
None
X 1
X 0
0 1
1 1
None
0 1
1 1
X 1
X 0 0
X 0
1
X 1
X 0 0
X 1 0
X None 0
X 1 1
X 1 1
X 0
1
X 1
X 0
1
X 1
X 0
1
X 1
X 1
None
X 1
None
None
None
None
None
None
None