Toshiba H1 Series Data Book page 657

32bit micro controller tlcs-900/h1 series
Table of Contents

Advertisement

(3) SDRAM burst read timing (Start burst cycle)
SDCLK
SDxxDQM
SDCS
t
CMS
SDRAS
SDCAS
SDWE
t
AS
A0~A9
A10
A11~A15
D0~D15
t
CK
t
t
MRD
RCD
t
CMH
t
CMH
t
t
t
AH
AH
AS
027
Row
Row
0
Row
92CZ26A-654
t
CMS
t
t
CMS
CMH
t
AS
Column
t
AC
TMP92CZ26A
t
t
AC
AC
Data input
Data input
t
t
OH
OH
Data
input

Advertisement

Table of Contents
loading

This manual is also suitable for:

Tlcs-900Tmp92cz26axbg

Table of Contents