Table of Contents
Advertisement
3.12.3 SFR
Bit symbol
TA0RDE
TA01RUN
Read/Write
(1100H)
After Reset
Function
Double
buffer
0: Disable
1: Enable
TA0REG double buffer control
0
1
Note: The values of bits 4 to 6 of TA01RUN are "1" when read.
Bit symbol
TA2RDE
TA23RUN
Read/Write
(1108H)
After Reset
Function
Double
buffer
0: Disable
1: Enable
TA3REG double buffer control
0
1
Note: The values of bits 4 to 6 of TA23RUN are "1" when read.
TMRA01 RUN Register
7
6
5
R/W
0
Disable
Enable
TMRA23 RUN Register
7
6
5
R/W
0
Disable
Enable
Figure 3.12.6 Register for TMRA (1)
92CZ26A-274
4
3
2
I2TA01
TA01PRUN
0
0
TMRA01
In IDLE2
prescaler
mode
0: Stop
0: Stop and clear
1: Operate
1: Run (Count up)
4
3
2
I2TA23
TA23PRUN
0
0
TMRA23
In IDLE2
prescaler
mode
0: Stop
0: Stop and clear
1: Operate
1: Run (Count up)
TMP92CZ26A
1
0
TA1RUN
TA0RUN
R/W
0
0
Up counter
Up counter
(UC1)
(UC0)
Count control
0
Stop and clear
1
Run (Count up)
1
0
TA3RUN
TA2RUN
R/W
0
0
Up counter
Up counter
(UC3)
(UC2)
Count control
0
Stop and clear
1
Run (Count up)
Advertisement
Table of Contents
