Toshiba H1 Series Data Book page 245

32bit micro controller tlcs-900/h1 series
Table of Contents

Advertisement

3.11.3
ECC Control
NAND Flash memory devices may inherently include error bits. It is therefore necessary to
implement the error correction processing using ECC (Error Correction Code).
Figure 3.11.4 shows a basic flowchart for ECC control.
Data Write
Valid data write to
NAND Flash
Valid data write to
ECC generator
ECC read
from ECC generator
Write ECC to
NAND Flash
Write:
1. When data is written to the actual NAND Flash memory, the ECC generator in
the NDFC simultaneously generates ECC for the written data.
2. The ECC is written to the redundant area in the NAND Flash separately from
the valid data.
Read:
1. When data is read from the actual NAND Flash memory, the ECC generator in
the NDFC simultaneously generates ECC for the read data.
2. The ECC for the written data and the ECC for the read data are compared to
detect and correct error bits.
END
Figure 3.11.4 Basic Flow of ECC Control
92CZ26A-242
Data Read
Valid data read from
NAND Flash
Valid data write to
ECC generator
ECC read from
NAND Flash
ECC read from
ECC circuit
Yes
Is there error?
No
END
TMP92CZ26A
Error correction
process

Advertisement

Table of Contents
loading

This manual is also suitable for:

Tlcs-900Tmp92cz26axbg

Table of Contents