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3.16.3.24 EPx_MODE Register (x: 1 to 3)
bit Symbol
EP1_MODE
(0789H)
Read/Write
After reset
bit Symbol
EP2_MODE
Read/Write
(078AH)
After reset
bit Symbol
EP3_MODE
Read/Write
(078BH)
After reset
This register sets transfer mode of endpoint (EP1 to EP3).
If transaction of SET_CONFIG and SET_INTERFACE are set to software control,
this control must use appointed config or interface. When it is setting mode, access
this register.
7
6
7
6
7
6
There is limitation to timing that can be written.
If transaction for SET_CONFIG and SET_INTERFACE are set to software control,
after received INT_SETUP interrupt, finish writing before access EOP register. This
register prohibits writing when it is other timing, and it is ignored.
DIRECTION (Bit0)
0: OUT
Direction of from host to device
1: IN
Direction of from device to host
MODE [1:0] (Bit2 and bit1)
00: Control transfer type
01: Isochronous transfer type
10: Bulk transfer type or interrupt transfer type
11: Interrupt (No toggle)
Note: If setting endpoint that is set to Isochronous transfer mode to "no use", after changed to
Isochronous mode, set to "no use" by COMMAND register.
PAYLOAD [2:0] (Bit3, bit4 and bit5)
000:
8 bytes
001:
16 bytes
010:
32 bytes
011:
64 bytes
0100:128 bytes
0101:256 bytes
0110:512 bytes
0111:1023 bytes (Note1, 2)
Note1: Max packet size of Isochronous transfer type is 1023 bytes.
Note2: If except 8, 16, ..., 1023 was set to wMaxPacketSize of descriptor, Payload
more than descriptor value is set by auto-answer of Set_Configration and
Set_Interface.
Others (Bit6 and bit7) Reserved
5
4
Payload[2]
Payload[1]
Payload[0]
R/W
R/W
0
0
5
4
Payload[2]
Payload[1]
Payload[0]
R/W
R/W
0
0
5
4
Payload[2]
Payload[1]
Payload[0]
R/W
R/W
0
0
92CZ26A-404
3
2
1
Mode[1]
Mode[0]
R/W
R/W
R/W
0
0
0
3
2
1
Mode[1]
Mode[0]
R/W
R/W
R/W
0
0
0
3
2
1
Mode[1]
Mode[0]
R/W
R/W
R/W
0
0
0
TMP92CZ26A
0
Direction
R/W
0
0
Direction
R/W
0
0
Direction
R/W
0
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