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In this mode the value of the register buffer will be shifted into TA0REG if 2
overflow is detected when the TA0REG double buffer is enabled.
Use of the double buffer facilitates the handling of low duty ratio waves.
Match with TA0REG
n
2
overflow
TA0REG
(Value to be compared)
Register buffer
Example: To output the following PWM waves on the TA1OUT pin (at f
* Clock state
To achieve a 20.48μs PWM cycle by setting φT1 to 0.16 μs (at f
20.48 μs ÷ 0.16 μs = 128
= 128
n
2
Therefore n should be set to 7.
Since the low level period is 16.0 μs when φT1 = 0.16 μs,
set the following value for TAREG:
16.0 μs ÷ 0.16 μs = 100 = 64H
MSB
7
← −
TA01RUN
← 1
TA01MOD
← 0
TA0REG
← X
TA1FFCR
← −
PM
← −
PMFC
← 1
TA01RUN
X: Don't care, −: No change
Up counter = Q
1
Q
1
Figure 3.12.25 Register Buffer Operation
16.0 μs
20.48 μs
Clcok gear :
Prescaler of clock gear : 1/2
LSB
6
5
4
3
2
1
0
−
−
−
X
X
X
0
1
1
0
X
X
0
1
1
1
0
0
1
0
0
X
X
X
1
0
1
X
−
X
X
X
X
0
0
−
X
X
X
X
1
X
−
−
X
X
X
1
1
92CZ26A-292
Shift into TA0REG
Q
2
1/1
= 50 MHz):
C
Stop TMRA0 and clear it to 0
Select 8-bit PWM mode (cycle: 2
input clock.
Write 64H.
Clear TA1FF to 0, enable the inversion and double buffer.
Set PM1 as the TA1OUT pin.
Start TMRA0 counting.
TMP92CZ26A
Up counter = Q
2
Q
2
Q
3
TA0REG (Register buffer)
write
= 50 MHz).
C
7
) and select φT1 as the
n
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