Toshiba H1 Series Data Book page 239

32bit micro controller tlcs-900/h1 series
Table of Contents

Advertisement

3.10.3 An Example of Calculating HDMA Transfer Time
The following shows an example of calculating the HDMA transfer time when SDRAM is used as
the transfer source.
1) Transfer from SDRAM to internal SRAM
Conditions:
System clock (f
SDRAM read cycle
SDRAM Auto Refresh interval
Internal RAM write cycle
Number of bytes to transfer
Calculation example:
Transfer time = (SDRAM read time + SRAM write time) × transfer count
(a) Read/write time
(SDRAM read 1 state × 2 + Internal RAM write 1 state) × 512 bytes/4 bytes
= 384 states × 1/60 MHz
= 6.4 μs
(b) Burst start/stop time
Start (TRCD: 2CLK) 5 states + Stop 2 states
= 7states/60 MHz
= 0.117 μs
(c) Auto Refresh time
Based on the above (a), Auto Refresh occurs once or zero times in 384 states. It is
assumed that Auto Refresh occurs once here.
(Precharge (TRP: 2CLK) 2 states + AREF (TRC: 5CLK) 5 states) ×AREF once
= 7 states × 1/60 MHz
= 0.117 μs
Total transfer time = (a) + (b) + (c)
)
: 60 MHz
SYS
: Full page (5-1-1-1), 16-bit data bus
16-bit data bus
: 936 states (15.6 μs)
: 1 state, 32-bit data bus
: 512 bytes
+ (SDRAM burst start + stop time)
+ (Precharge time + Auto Refresh time) × Auto Refresh count
= 6.4 μs + 0.117 μs + 0.117 μs
= 6.634 μs
92CZ26A-236
TMP92CZ26A

Advertisement

Table of Contents
loading

This manual is also suitable for:

Tlcs-900Tmp92cz26axbg

Table of Contents