Toshiba H1 Series Data Book page 731

32bit micro controller tlcs-900/h1 series
Table of Contents

Advertisement

(12) DMAC (5/7)
Symbol
Name
Address
0940H
DMA
source
HDMAS4
0941H
address
Register4
0942H
0944H
DMA
destination
HDMAD4
0945H
address
Register4
0946H
0948H
DMA
Transfer
HDMACA4
count
number A
Register4
0949H
094AH
DMA
Transfer
HDMACB4
count
number B
Register4
094BH
DMA
transfer
HDMAM4
094CH
Mode
Register4
7
6
5
D4SA7
D4SA6
D4SA5
0
0
0
D4SA15
D4SA14
D4SA13
0
0
0
D4SA23
D4SA22
D4SA21
0
0
0
D4DA7
D4DA6
D4DA5
0
0
0
Destination address for DMA4 (7:0)
D4DA15
D4DA14
D4DA13
0
0
0
Destination address for DMA4 (15:8)
D4DA23
D4DA22
D4DA21
0
0
0
Destination address for DMA4 (23:16)
D4CA7
D4CA6
D4CA5
0
0
0
D4CA15
D4CA14
D4CA13
0
0
0
D4CB7
D4CB6
D4CB5
0
0
0
D4CB15
D4CB14
D4CB13
0
0
0
92CZ26A-728
4
3
D4SA4
D4SA3
R/W
0
0
Source address for DMA4 (7:0)
D4SA12
D4SA11
R/W
0
0
Source address for DMA4 (15:8)
D4SA20
D4SA19
R/W
0
0
Source address for DMA4 (23:16)
D4DA4
D4DA3
R/W
0
0
D4DA12
D4DA11
R/W
0
0
D4DA20
D4DA19
R/W
0
0
D4CA4
D4CA3
R/W
0
0
Transfer count A [15:8] for DMA4
D4CA12
D4CA11
R/W
0
0
Transfer count A [15:8] for DMA4
D4CB4
D4CB3
R/W
0
0
Transfer count B [7:0] for DMA4
D4CB12
D4CB11
R/W
0
0
Transfer count B [15:8] for DMA4
D4M4
D4M3
0
0
DMA transfer mode
000: Destination INC (I/O → MEM)
001: Destination DEC (I/O → MEM)
010: Source INC (MEM → I/O)
011: Source DEC (MEM → I/O)
100: Source/destination INC
(MEM → MEM)
101: Source/destination DEC
(MEM → MEM)
110: Source/destination fixed
(I/O→ I/O)
111: Reserved
TMP92CZ26A
2
1
0
D4SA2
D4SA1
D4SA0
0
0
0
D4SA10
D4SA9
D4SA8
0
0
0
D4SA18
D4SA17
D4SA16
0
0
0
D4DA2
D4DA1
D4DA0
0
0
0
D4DA10
D4DA9
D4DA8
0
0
0
D4DA18
D4DA17
D4DA16
0
0
0
D4CA2
D4CA1
D4CA0
0
0
0
D4CA10
D4CA9
D4CA8
0
0
0
D4CB2
D4CB1
D4CB0
0
0
0
D4CB10
D4CB9
D4CB8
0
0
0
D4M2
D4M1
D4M0
R/W
0
0
0
Transfer data size
00: 1 byte
01: 2 bytes
10: 4 bytes
11: Reserved

Advertisement

Table of Contents
loading

This manual is also suitable for:

Tlcs-900Tmp92cz26axbg

Table of Contents