Toshiba H1 Series Data Book page 246

3.11.3.1 Differences between Hamming Codes and Reed-Solomon Codes
The NDFC includes an ECC generator supporting NAND Flash memory devices of SLC
(or 2LC: two states) type and MLC (or 4LC: four states) type.
The ECC calculation using Hamming codes (supporting SLC) generates 22 bits of ECC
for every 256 bytes of valid data and is capable of detecting and correcting a single-bit error
for every 256 bytes. Error bit detection calculation and correction must be implemented by
software. When using SmartMedia™, Hamming codes should be used.
The ECC calculation using Reed-Solomon codes (supporting MLC) generates 80 bits of
ECC for every 1 byte to 518 bytes of valid data and is capable of detecting and correcting
error bits at four addresses for every 518 bytes. When using Reed-Solomon codes, error bit
detection calculation is supported by hardware and only error bit correction needs to be
implemented by software.
The differences between Hamming codes and Reed-Solomon codes are summarized in
Table 3.11.1.
Table 3.11.1 Differences between Hamming Codes and Reed-Solomon Codes
Maximum number of 1 bit
correctable errors
Number of ECC bits 22 bits/256 bytes
Error bit detection Software
method
Error bit correction Software
method
Error bit detection time Depends on the software to be used.
Others Supports SmartMedia™.
Number of
Reed-Solomon Error Bit
Detection Time (Unit: Clocks)
Error Bits
4
3
2
1
0
Hamming
813 (max)
These values indicate the total number of clocks for
648 (max)
detecting error bit(s) not including the register read/write
358 (max)
time by the CPU.
219 (max)
1
92CZ26A-243
Reed-Solomon
4 addresses
(All the 8 bits at one address are correctable.)
80 bits/up to 518 bytes
Hardware
Software
See the table below.
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Notes
TMP92CZ26A