Toshiba H1 Series Data Book page 233

32bit micro controller tlcs-900/h1 series
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(c) Full-page read, the read data shift function enabled (SDACR<SRDS> = "1",
<SRDSCK> = "0")
SDCLK
NOP
COMMAND
Row Address
A15-A0
D15-D0
Internal system
clock
Internal data bus
(5) Read/Write commands
The Read/Write commands to be used in 1-word read/single write mode can be specified by
using SDACR<SPRE>.
When SDACR<SPRE> is set to "1", the Read/Write commands are executed with Auto
Precharge. When Auto Precharge is enabled, the SDRAM is automatically precharged
internally at every access cycle. Thus, the SDRAM is always in a "bank idle" state while it is
not being accessed. This helps reduce the power consumption of the SDRAM but at the cost of
degradation in performance as the Bank Active command is needed at every access cycle.
When SDACR<SPRE> is set to "0", the Read/Write commands are executed without Auto
Precharge. In this case, the SDRAM is not precharged at every access cycle and is always in a
"bank active" state. This increases the power consumption of the SDRAM, but improves
performance as there is no need to issue the Bank Active command at every access cycle. If an
access is made to outside the SDRAM page boundaries or if the Auto Refresh command is
issued, the SDRAMC automatically issues the Precharge All command.
ACTIVE
READ
92CZ26A-230
NOP
NOP
ColumnAddress
DIN1
DIN1
External data latch
CPU data read
TMP92CZ26A
NOP
NOP
DIN2
DIN3
DIN2
DIN3

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