Block Diagram - Hitachi H8S/2678 Series Reference Manual

16-bit single-chip microcomputer

Table of Contents

Block Diagram

External pins

Interrupt request

signals to CPU for

individual channels

EDSARn: EXDMA source address register

EDDARn: EXDMA destination address register

EDTCRn: EXDMA transfer count register

EDMDRn: EXDMA mode control register

EDACRn: EXDMA address control register

EDREQn: EXDMA transfer request

EDRAKn: EDREQn acknowledge

ETENDn: EXDMA transfer end

EDACKn: EXDMA transfer acknowledge

Control logic

Figure 6.4 Block Diagram of EXDMAC

Bus controller

Address buffer

Internal data bus