Hitachi H8S/2678 Series Reference Manual page 568

SCKCR—System Clock Control Register
Bit
PSTOP
Initial value
Read/Write R/W
ø Clock Output Control
PSTOP
7 6
—
0 0
R/W
Frequency Multiplication Factor Switching Mode Select
0 Specified multiplication factor is valid after transition
1
Normal
Operation
0 ø output
1 Fixed high
5 4
— — STCS
0 0
— — R/W
to software standby mode
Specified multiplication factor is valid immediately
after STC bits are rewritten
Sleep Mode
ø output
Fixed high
H'FF3B
3 2
SCK2 SCK1
0 0
R/W
System Clock Select 2 to 0
0 0 0 1/1
1 1/2
1 0 1/4
1 1/8
1 0 1 1/16
1 1/32
1 — Setting prohibited
Software
Standby Mode
Fixed high
Fixed high
System Control
1 0
SCK0
0 0
R/W R/W
Hardware
Standby Mode
High impedance
High impedance
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